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موضوع مقاله در مورد :
On the Design of a Photonic Network-on-Chip
چکیده:
Recent remarkable advances in nanoscale silicon photonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the unique capabilities of optical technologies in the on-chip communications infrastructure. Based on these nano-photonic building blocks, we consider a pho tonic network-on-chip architecture designed to exploit the enormous transmission bandwidths, low latencies, and low power dissipation enabled by data exchange in the opti cal domain. The novel architectural approach employs a broadband photonic circuit-switched network driven in a distributed fashion by an electronic overlay control network which is also used for independent exchange of short mes sages. We address the critical network design issues for insertion in chip multiprocessors (CMP) applications, in cluding topology, routing algorithms, path-setup and tear down procedures, and deadlock avoidance. Simulations show that this class of photonic networks-on-chip offers a significant leap in the performance for CMP intrachip com munication systems delivering low-latencies and ultra-high throughputs per core while consuming minimal power.
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موضوع مقاله در مورد :All-Optical Wavelength-Routed Architecture for a Power-Efficient Network on Chip
چکیده:
In this paper, we propose a new architecture for nanophotonic Networks on Chip (NoC), named 2D-HERT, which consists of optical data and control planes. The proposed data plane is built upon a new topology and all-optical switches that passively rout optical data streams based on their wavelengths. Utilizing wavelength routing method, the proposed deterministic routing algorithm, and Wavelength Division Multiplexing (WDM) technique, the proposed data plane eliminates the need for optical resource reservation at the intermediate nodes. For resolving end-point contention, we propose an all-optical request-grant arbitration architecture which reduces optical losses compared to the alternative arbitration schemes. By performing a series of simulations, we study the efficiency of the proposed architecture, its power and energy consumption, and the data transmission delay. Moreover, we compare the roposed architecture with electrical NoCs and alternative optical NoCs under various synthetic traffic patterns. Averaged across different traffic patterns, 2D-HERT reduces data transmission delay by 24, 15, 18, 4, and 70 percent and achieves average per-packet power reduction of 58, 47, 52, 45, and 95 percent over Phastlane, Firefly, Corona architecture, -router, and electrical Torus, respectively
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